Altera, Synopsys Collaborate to Make Nios II Processor Core Available for ASIC Designs
November 23, 2007 // Published as a news service by IHS
Altera Corp. and Synopsys Inc. announced that the Altera Nios II processor core will be available for licensing through the Synopsys DesignWare Star IP Program.
Expanding on the existing Altera field-programmable gate array (FPGA) and HardCopy structured application-specific integrated circuit (ASIC) product deployment options, this new offering enables Nios II users to migrate their designs to standard cell ASICs.
"We have been deploying products based on the Nios II processor core in ASIC forms for several years," said Eric Lu, chairman of Lionic Corp.
"We welcome the new offering from Altera and Synopsys because the combination of an ASIC-optimized Nios II processor core, all the supporting DesignWare IP and the … design and simulation tools from Synopsys will help ensure quality and the shortest time to market," Lu said.
Karlheinz Ronge, head of department, IC design digital systems at Fraunhofer Institute Integrated Circuits, said, "We have used Altera's Nios II processor core in a number of projects targeting FPGA devices. Having an option to use the Nios II processor core for standard cell ASICs through Synopsys, in addition to FPGAs and structured ASICs, will allow us to broaden our usage of this powerful and flexible processor core for high-volume applications."
The DesignWare Star IP program provides designers access to processor and digital signal processor (DSP) cores developed by Star IP providers. Using its core competencies in design-for-reuse, intellectual property (IP) packaging methodologies and design flows, Synopsys will provide a configurable, synthesizable version of the Nios II processor core optimized for ASIC implementation.
Designers can use the core in the foundry and process technology of their choice. By combining this reusable core with its portfolio of tools, support, design services and additional key system-on-chip (SoC) IP building blocks, Synopsys said it offers designers a tool for realizing their Nios II processor-based ASICs and application-specific standard parts (ASSPs).
The synthesizable version of the Nios II processor core is expected to be available from Synopsys in 1Q 2008.
Source: Altera Corp.